1. Field of the Invention
The present invention relates to a nonvolatile memory with cluster-erase flash capability called a flash EEPROM (hereinafter referred to as a flash memory), and more particularly to a solid state file apparatus which can dynamically allocate sectors.
2. Description of Prior Art
As portable personal computers, such as notebook-types, have spread, the requirement for small-size, light weight, and low power consumption computer systems has increased. An external storage device or solid state file using solid state memories has a low power consumption and can operate at high speed because, unlike a magnetic disk apparatus, it does not have a mechanical drive system. Further, since it is composed of small memory modules, it is small in size, light in weight, and has a large degree of freedom with respect to shape as compared with a magnetic disk apparatus, and is also easily made in the form of a card.
However, the conventional solid state memory has many problems with respect to such points as cost, capacity, and battery backup. If SRAMs are used as the memory, the cost is high and hence the capacity becomes small though the backup time by a battery becomes long. For DRAMs, which are excellent in cost and capacity, the standby power consumption is large and the backup time is limited to one week or so. There is also a problem of data loss due to problems in the battery system. EEPROMs are costly though they require no battery.
A flash memory has been developed as a memory to solve these problems. Its memory element is composed of one transistor as a DRAM so that it can be packaged at high density, and it is expected to have a bit cost equivalent to or less than a DRAM (low cost, large capacity), depending on the future market. The memory element is nonvolatile and does not require battery backup. Erasure is generally performed for each chip for each smaller block. The outline of such a flash memory is introduced by Richard D. Pashley et al. in "Flash Memories: the best of two worlds," IEEE SPECTRUM, December 1989, pp. 30-33. As far as performance is concerned, the block erase type is superior to the chip erase type.
When the block erase type flash memory is used for a solid state file, it is convenient to memory management if the size of a block is made equal to a sector, which is a unit of access in the magnetic disk apparatus. European Patent Application 392895, for example, discloses a flash EEPROM system of the sector erase type. The system makes it possible to simultaneously erase any plural sectors by providing a latch for each sector, which is a unit of erasure, and setting a latch corresponding to a sector to be erased. Also known is a flash memory whose unit of erasure is a block having a size equivalent to a plurality of sectors (e. g. 4K bytes). This is sometimes called the cluster erase type to distinguish it from the sector erase type.
However, the flash memory has limitations which SRAMs and DRAMs do not have. First, the programming of memory bits is a one-way process and change is allowed only from 0 to 1 or from 1 to 0. Therefore, when new data is to be written to a memory location which has already been written on, writing should be performed after a block including that memory location has been erased to the all 0 or all 1 state. It is usually takes from several tens of milliseconds to several seconds for erasure and writing. Further, the flash memory is deteriorated by erasure and writing and reaches a usage limit, at present, after several tens of thousands to several hundreds of thousands of erasures and writings.
If such a flash memory is used for a solid state file, a problem arises in that writing is based to a portion of the memory if the same logical sector is allocated to the same physical sector. For example, in a DOS-based personal computer system, a file allocation table (FAT) is frequently updated. However, since the FAT address is fixed, a block storing the FAT has to be erased and then written each time the FAT is updated, in the case of a flash memory, and it takes several tens of milliseconds to several seconds each time. If a particular block which is a portion of memory is frequently erased and written, that block reaches the use limit faster than other blocks, and therefore, the memory needs to be replaced even if the other blocks can still be used. Early replacement of the memory could be avoided if the block which has reached its use limit is invalidated and an alternative block is used instead. However, this means that a block on which writing is concentrated is merely changed to an alternative block, and therefore, does not provide a radical solution.
Then, Japanese Pat. Appln. No. 3-197318 has succeeded in solving these problems by employing dynamic sector allocation. The method is briefly described referring to FIGS. 1 and 2. An address translation table is created in a RAM. By referencing the table, an address (logical address) specified by the host processor is translated to an address (physical address) specifying a sector (physical sector) of a solid state file apparatus (SSF). That is, the host processor specifies a location to be written with data by a logical address consisting of a head number, a cylinder number, and a sector number. A physical address corresponding to the logical address is stored in an entry identified by a logical address in the address translation table. Each sector of the SSF to be specified by the physical address contains an area for storing a reverse reference pointer (RP) and an area for storing the status of the sector in addition to the data area for storing data.
Now, it is assumed that, when the SSF receives a write command regarding a logical address (H, C, S)=(1, 4, 5) from the host processor, a sector Y, which is empty until then, is allocated to the logical address. A controller of SSF writes data in the data area of the physical sector Y, and writes an RP area (1, 4, 5) to set the `sector valid` flag in the status area. At the same time, a physical address ABC is written in an entry X in the translation table identified by the logical address (1, 4, 5). Thereafter, whenever reading of data from the logical address (1, 4, 5) is requested, the physical address ABC is accessed by using the address translation table (see FIG. 1).
When the SSF again receives from the host processor a write command to the logical address (H, C, S)=(1, 4, 5), the controller of SSF invalidates the physical data Y, and allocates a physical, which is empty until then, to the logical address (1, 4, 5). For example, the entry X in the address translation table is rewritten to ABD, data is written in the data area of a sector Z at the physical address ABD in the SSF, (1, 4, 5) is written in the RP area, and a flag is set in the status area indicating that it is valid. At the same time, a flag is set in the status area of the sector Y indicating that it is invalid.
Then, because the address translation table is lost when the system is turned off, it is required to be reconstructed when the system is turned on again. In such a case, the physical address of that sector is registered in an entry in the address translation table specified by the reverse reference pointer. If one or more sectors have the same RP as shown in FIG. 2, the physical addresses of valid sectors are registered. Thus, the valid/invalid information on a sector of the SSF is essential to the reconstruction of the address translation table which is the key to the dynamic allocation.
On the other hand, as described earlier, because data cannot be written in a sector contained in a block unless it is erased, it is generally difficult to update the status of sector. Against this problem, patent application No. 3-197318 discloses a method in which the "blank," "valid," "invalid" or "being erased" state of each sector is indicated by changing the status flag bit from "1111".fwdarw."1110".fwdarw.1100".fwdarw.0000" based on the property of some of flash memories that, when the bit change is limited to only one direction, it is overwritable. However, some NAND type flash EEPROMs cannot be overwritten at all, to which the method using the status bit cannot be used.